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Texas Instruments /MSP432P411Y /CS /CSCLKEN

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Interpret as CSCLKEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ACLK_EN_0)ACLK_EN 0 (MCLK_EN_0)MCLK_EN 0 (HSMCLK_EN_0)HSMCLK_EN 0 (SMCLK_EN_0)SMCLK_EN 0 (VLO_EN_0)VLO_EN 0 (REFO_EN_0)REFO_EN 0 (MODOSC_EN_0)MODOSC_EN 0 (REFOFSEL_0)REFOFSEL

MCLK_EN=MCLK_EN_0, SMCLK_EN=SMCLK_EN_0, HSMCLK_EN=HSMCLK_EN_0, ACLK_EN=ACLK_EN_0, MODOSC_EN=MODOSC_EN_0, VLO_EN=VLO_EN_0, REFO_EN=REFO_EN_0, REFOFSEL=REFOFSEL_0

Description

Clock Enable Register

Fields

ACLK_EN

ACLK system clock conditional request enable

0 (ACLK_EN_0): ACLK disabled regardless of conditional clock requests

1 (ACLK_EN_1): ACLK enabled based on any conditional clock requests
MCLK_EN

MCLK system clock conditional request enable

0 (MCLK_EN_0): MCLK disabled regardless of conditional clock requests

1 (MCLK_EN_1): MCLK enabled based on any conditional clock requests
HSMCLK_EN

HSMCLK system clock conditional request enable

0 (HSMCLK_EN_0): HSMCLK disabled regardless of conditional clock requests

1 (HSMCLK_EN_1): HSMCLK enabled based on any conditional clock requests
SMCLK_EN

SMCLK system clock conditional request enable

0 (SMCLK_EN_0): SMCLK disabled regardless of conditional clock requests.

1 (SMCLK_EN_1): SMCLK enabled based on any conditional clock requests
VLO_EN

Turns on the VLO oscillator

0 (VLO_EN_0): VLO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK.

1 (VLO_EN_1): VLO is on
REFO_EN

Turns on the REFO oscillator

0 (REFO_EN_0): REFO is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK

1 (REFO_EN_1): REFO is on
MODOSC_EN

Turns on the MODOSC oscillator

0 (MODOSC_EN_0): MODOSC is on only if it is used as a source for ACLK, MCLK, HSMCLK or SMCLK

1 (MODOSC_EN_1): MODOSC is on
REFOFSEL

Selects REFO nominal frequency

0 (REFOFSEL_0): 32 kHz

1 (REFOFSEL_1): 128 kHz

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data